Recovery Schemes for Mesh Arrays Utilizing

Error recovery capability is examined in processing arrays that employ spare nodes for fault tolerance. Spares can provide fault tolerance to high-performance single-package arrays, where it is not feasible to repair faulty subsystems. The cost of such a fault-tolerance solution , redundant hardware that idles until needed, may not be practical. Manufacturers must be ooered hardware solutions to fault tolerance that provide useful work at all times. In this paper, new schemes are presented in which idling spares can be utilized to improve error recovery. Without expedient error recovery, computation in environments experiencing frequent errors can be burdened with extra cost in terms of job completion time. Further, in such environments, a job may never be able to reach completion. Spares will aid in the validation and in the selection of recovery points in systems experiencing randomly distributed errors. Successful job completion in environments of error bursts is performed with the aid of a scheme 1] that identiies reliable data when periodic on-line testing is available. Spares will help identify the boundaries of reliable data. We consider these features in mesh arrays that are used in digital signal processing applications. Preliminary simulations highlight the overhead of our schemes in terms of job completion times in environments burdened with transient errors. In general, when a system fails, operation must stop, faulty components must be identiied and reconngured, and the current job must be restarted from the beginning. Error recovery is the ability to continue healthy operation without losing all computation results, that is, without having to return to the job start. In transient error environments, where frequent errors are expected due to power supply jitter, noise and/or radiation 5], the cost of starting a failed job at the beginning can have signiicant impact in terms of the time-to-complete the job. Further, the job may never be able to reach completion. In this paper, we provide the additional capability of error recovery to processing arrays that utilize spare nodes to achieve fault coverage. Existing coverage schemes 7] call for spares to idle until required for coverage. Valuable real estate is taken up by idling circuitry, and further, power is sacriiced. These unresolved, practical issues plus the cost of extra hardware have hindered spares-oriented schemes from widespread use in the eld. The reliable operation of large single-package array systems, necessary to achieve high performance levels and size reduction depends on fault tolerance. Redundant …